Style de citation APA (7e éd.)

Vaidyanathan, K. Design Technology Co-Optimization in the Era of Sub-Resolution IC Scaling. SPIE Digital Library.

Style de citation Chicago (17e éd.)

Vaidyanathan, Kaushik. Design Technology Co-Optimization in the Era of Sub-Resolution IC Scaling. SPIE Digital Library.

Style de citation MLA (9e éd.)

Vaidyanathan, Kaushik. Design Technology Co-Optimization in the Era of Sub-Resolution IC Scaling. SPIE Digital Library.

Attention : ces citations peuvent ne pas être correctes à 100%.